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Inference 101

One page per topic, grouped by family: the mechanism, the arithmetic, the knobs that matter and how they interact with the models you train.

Memory and attention

The KV cache, attention kernels and where the memory goes.

Inference 101

FlashAttention for inference: tiled prefill and split-KV decoding

FlashAttention tiles attention through on-chip memory with a running softmax so the N x N score matrix is never written to HBM; Flash-Decoding splits the KV cache across thread blocks for fast long-context decode.

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Inference 101

The KV cache: memory formula, GQA, MQA, MLA and long-context sizing

The KV cache stores each layer's keys and values for every processed token so decoding does one token of work per step, at a memory cost of 2 x layers x KV heads x head dim x bytes per token.

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Inference 101

KV cache quantization and eviction: FP8, INT4, H2O and attention sinks

KV cache compression stores cached keys and values in fewer bits (FP8, INT4, INT2) or keeps fewer of them (sinks plus recent window, heavy hitters), trading accuracy for memory and bandwidth.

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Inference 101

The roofline of LLM inference: prefill, decode, TTFT and TPOT

A forward pass costs FLOPs and bytes; prefill does hundreds of FLOPs per byte and hits the compute roof, while decode does a few and is limited by memory bandwidth.

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Inference 101

PagedAttention: paging the KV cache

PagedAttention stores the KV cache in fixed-size blocks mapped through per-sequence block tables, eliminating reservation and fragmentation waste and enabling copy-on-write sharing.

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Inference 101

Prefix caching and RadixAttention

Prefix caching keeps the KV cache of earlier requests and reuses it exactly when a new prompt starts with the same tokens, so only the new suffix is prefilled.

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Scheduling and decoding

Batching, scheduling and decoding strategies that set throughput and latency.

Serving post-trained models

Adapters, quantisation and deployment patterns for tuned models.

Inference 101

FP8 and FP4 inference, SmoothQuant and activation quantization

FP8 and FP4 inference quantize activations as well as weights so tensor cores run at low precision, and the whole difficulty is a few activation channels hundreds of times larger than the rest.

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Inference 101

Tuning for latency SLOs: batch size, token budgets, TTFT, TPOT and goodput

Latency SLO tuning picks the batch cap, per-step token budget and output limits that maximise goodput: the highest request rate at which most requests still meet TTFT and TPOT targets.

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Inference 101

Merge the LoRA or serve the adapter?

Merging a LoRA gives zero inference overhead and one checkpoint per fine-tune; serving it unmerged costs a little per step but lets many fine-tunes share one deployment.

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Inference 101

Multi-LoRA serving: S-LoRA, Punica and adapter batching

Multi-LoRA serving keeps one copy of the base model on the GPU and batches requests for many different LoRA adapters together, adding a small per-adapter cost per decode step.

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Inference 101

Parallelism for serving: tensor, pipeline and expert parallelism

Serving parallelism splits a model across GPUs by matrix (tensor), by layer (pipeline) or by expert, trading lower latency and more memory against communication on every decode step.

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Inference 101

Weight-only quantization: GPTQ, AWQ and keeping your fine-tune

GPTQ and AWQ store weights in about 4 bits using a little calibration data, cutting decode memory traffic nearly 4x, and the calibration set decides how much of a fine-tune survives.

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Bring a model and a metric.

Tell us what the model should get better at. A post-training engineer replies within one business day with a plan, a compute estimate and an eval design.